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Micron Technology seeks a highly skilled HBM Design Architect to lead the design, architecture, and integration of advanced DRAM technologies. This role focuses on nanometer-scale DRAM array architectures, high-speed signaling, and 2.5D/3D packaging innovations, enabling next-generation AI, HPC, and data-intensive systems.
🔍 Job Details
| Title | HBM Design Architect |
|---|---|
| Organization | Micron Technology |
| Work Location | Richardson, Texas, USA |
| Research Field | Nanotechnology, DRAM Architecture, Semiconductor Engineering |
| Funding Info | Full-time, Industry Position |
| Application Deadline | Not specified |
| Posted Date | 2025 |
| Country | USA |
| Researcher Profile | Industry Professional (Nanotech & DRAM Architecture) |
| Apply Button | Apply Now |
| Required Qualification | BSEE or higher, 10+ years in engineering/design |
| Required Experience | DRAM, high-speed interfaces, 2.5D/3D packaging, CMOS device physics |
| Salary Details | Competitive + benefits |
Role Summary
The HBM Design Architect at Micron Technology will be at the forefront of nanometer-scale memory innovation, shaping next-generation High Bandwidth Memory (HBM) for AI, HPC, and advanced semiconductor systems. You will combine expertise in DRAM array design, high-speed interface development, and advanced 2.5D/3D packaging to deliver cutting-edge memory solutions with optimal performance, power efficiency, and reliability.
Key Responsibilities
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Lead architecture pathfinding and feasibility analysis for new HBM generations.
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Collaborate with customers to refine specifications and future designs.
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Debug pre- and post-silicon HBM issues and identify root causes.
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Innovate in nanotechnology-driven DRAM arrays, signal integrity, and thermal modeling.
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Work with JEDEC standards, CAD, verification, and system engineering teams.
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Mentor engineers in advanced DRAM and packaging techniques.
Required Qualifications
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Education: BSEE or higher (nanotechnology, electrical engineering, semiconductor engineering).
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Experience: 10+ years in engineering/design; strong background in nanometer CMOS, DRAM architecture, and 3D integration.
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Expertise in one or more:
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Memory array design
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High-speed clocking/interfaces
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Logic/custom circuit design
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Power delivery optimization
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2.5D/3D packaging (TSV, hybrid bonding, interposers)
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Strong understanding of semiconductor device physics.
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Familiarity with DRAM bring-up, JEDEC standards, and modeling tools (FastSpice, Hspice).
Work Culture & Benefits
At Micron, you will work in a collaborative, innovation-driven environment, solving real-world challenges in nano-enabled semiconductor technologies. Benefits include:
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Comprehensive medical, dental, and vision coverage
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Paid time off and family leave
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Income protection and holidays
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Opportunities for professional growth in nanotechnology and semiconductor design
Reference Links
Disclaimer
This job post is for informational purposes only. Please refer to Micron Technology’s official careers page for the most accurate and updated application details.
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