Join Micron Technology’s world-class TD ESD/Latch-up team to design and optimize electrostatic discharge protection in cutting-edge semiconductor devices. This role blends electrical engineering expertise with nanotechnology-level precision to ensure product reliability at wafer and chip scale.
🔍 Job Details
| Field | Information |
|---|---|
| Title | Senior Engineer, TD ESD |
| Organization | Micron Technology, Inc. |
| Work Location | Hyderabad, Telangana, India |
| Research/Engineering Field | Nanotechnology, Microelectronics, Electrical Engineering |
| Funding / Employment Type | Full-Time |
| Application Deadline | Not specified (Apply ASAP) |
| Posted Date | Recent (2025) |
| Country | India |
| Researcher Profile | Experienced semiconductor engineer with ESD/LUP expertise |
| Required Qualification | BS/MS/PhD in Electrical Engineering, Microelectronics |
| Required Experience | 3–8 years (depending on qualification) |
| Salary Details | Competitive; based on experience |
| Apply Link | Apply Now at Micron Careers |
Detailed Blog Article
Micron Technology — a global leader in memory and storage solutions — is seeking a Senior Engineer, TD ESD to join its ESD/Latch-Up Design and Characterization team in Hyderabad, India. This role is central to ensuring semiconductor devices meet stringent electrostatic discharge (ESD) and latch-up (LUP) protection standards, a critical factor in nanotechnology-enabled microchip reliability.
Key Responsibilities
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Design & Simulation – Develop various ESD clamps for both signal and power lines, simulating their high-current and voltage behavior.
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Architecture Optimization – Analyze driver/receiver circuitry and propose optimal ESD solutions.
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Wafer-Level Characterization – Assess ESD device properties using TLP and vf-TLP data to create robust design rules.
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Guideline Development – Formulate and maintain ESD/LUP design guidelines for product teams.
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Verification & Signoff – Conduct full-chip ESD reviews using tools like PERC and Pathfinder, ensuring compliance before tape-out.
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First Silicon Validation – Lead silicon-level ESD and latch-up testing, root cause analysis, and design improvements.
Qualifications
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Education:
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BS in Electrical Engineering/Microelectronics with 5–8 years of experience
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MS with 3–6 years of experience
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PhD with relevant semiconductor design experience
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Skills:
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Proficiency in Cadence design tools
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Experience with PERC, Pathfinder or similar ESD verification software
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Strong data analysis skills for high-current ESD behavior evaluation
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Excellent technical communication skills for collaboration across R&D and design teams
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Why This Role Matters
With shrinking device geometries in nanotechnology-driven semiconductor fabrication, ESD protection is becoming increasingly complex. The Senior Engineer will safeguard Micron’s DRAM, NAND, and NOR technologies against failure mechanisms at the nanoscale — directly impacting product reliability, yield, and global market competitiveness.
Reference Link
Micron Careers – Senior Engineer, TD ESD (Hyderabad)
Disclaimer
All details provided are based on publicly available information from Micron Technology’s official careers portal. For the latest updates, eligibility criteria, and application process, please visit the official job listing.
Apply Now: Submit Your Application Here
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